1. Field of the Invention
The present invention relates to circuits for protecting power components such as vertical MOS (VDMOS) or insulated-gate bipolar transistors (IGBT) against forward overvoltages.
2. Discussion of the Related Art
In the following description, power MOS transistors will always be referred to. However, it should be understood that the whole description also applies to insulated-gate bipolar transistors (IGBT) whose structure is substantially identical, except for the fact that they include, on a back face thereof, an additional layer having a conductivity type opposite to that of the layer forming the rear surface of a power MOS transistor.
FIG. 1 is a schematic cross-sectional view of a conventional embodiment of a vertical MOS transistor. The MOS transistor is formed in an N-type substrate 1, whose back surface includes an overdoped N.sup.+ -type layer 2 coated with a drain metallization 3. In the front surface thereof are formed P-type wells 4 including a more highly doped central region 5 and a lower doped peripheral region 6. The internal periphery of each well includes a highly doped N-type diffused region 7. A conductive gate 8 is formed above an insulating layer 9, and overlaps two adjacent wells or cells. Gate 8 is protected by an insulating layer 10 and the whole upper surface is coated with a source metallization 11 that contacts the N.sup.+ -type regions and the central portion of each cell.
The transistor of FIG. 1 is turned on so that it is conductive between its drain and its source, the drain being positive with respect to the source when a voltage is applied to the gate. Then, a current flows from the drain, through substrate 1 and a channel region formed at the upper portion 12 of the P-type wells beneath the gate region, to region 7 and the source metallization.
The difference between the structure of an IGBT and the VDMOS transistor shown in FIG. 1 includes that region 2 of the IGBT is of the P.sup.+ -type instead of the N.sup.+ -type. The IGBT's main electrodes are then generally referred to as emitter and collector, and its control terminal is still referred to as a gate.
A component such as the one of FIG. 1 should be turned on only when its drain is positive with respect to its source and when a signal is provided to its gate. However, when a high voltage is applied to the drain, the junction between substrate 1 and well 4, may then be set into avalanche mode. Such a breakdown is not desirable because it may cause heating of the area where the avalanche mode is generated due to excessive current flow; such heating can have a destructive effect.
Therefore, one tries to avoid such a spontaneous avalanche (without gate control). In the prior art, various methods have already been provided in order to detect the occurrence, across a component, of an overvoltage having a value close to its avalanche voltage, and to set the component to conduction mode before the avalanche value is reached.
Conventionally, two types of protection circuits are available. The first type is a clamp circuit, the second type is a crowbar circuit.
FIGS. 2A and 2B schematically show the connection of a power transistor 20 whose source is connected to ground and drain is connected to a first terminal of a load 21 having its second terminal connected to a positive supply terminal VCC. The conduction of transistor 20 is controlled by a gate drive circuit 22. Circuit 22 is generally controlled from an external access terminal 23.
FIG. 2A more particularly shows a clamp-type protection circuit. Between drain and gate of the MOS transistor 20 are serially connected an avalanche diode (usually referred to as a zener diode) Z1 and a reverse biased diode D1. Zener diode Z1 has an avalanche volt-age that is selected slightly lower (usually a few tens of volts) than the avalanche voltage of MOS transistor 20. Diode D1 is operable to prevent, under normal operation conditions, the gate current from flowing toward the transistor drain.
In this circuit, when an overvoltage having an amplitude higher than the avalanche voltage of zener diode Z1, plus the voltage drop VF of diode D1 and the gate-source threshold voltage VGS of transistor 20, occurs, the MOS transistor is set to conduction mode. For the sake of simplification, it is assumed that the leakage current in the gate drive circuit 22 is negligible. However, during the time transistor 20 is set to conduction state, its drain stays at voltage VZ1+VF+VGS, that is, the voltage drop across the MOS transistor is significant and the MOS transistor is set to a partial conduction state only. The energy will then be mainly dissipated in the transistor that has a high voltage drop across its terminals and a non-negligible current. If this energy is high, it is capable of destroying the MOS transistor through heating. Thus, the above-mentioned clamp-type protection mode applies only when it is desired to achieve protection against overvoltages having a low energy. Such low energy overvoltages occur, for example, after the initial switching-on of a slightly inductive load. The advantage of this protection mode is that the conduction of the MOS transistor is interrupted as soon as the overvoltage disappears.
FIG. 2B schematically shows a crowbar-type protection circuit. In this case, the zener diode Z1 connected to the drain of transistor 20 is also connected to an overvoltage detection circuit 24. As soon as an overvoltage occurs, circuit 24 provides a signal at terminal 23 of the gate drive circuit 22 that causes the transistor 20 to go into the conduction state. Once transistor 20 goes into conduction due to gate drive circuit 22, the voltage across its terminals drops to a low value (RON); therefore, it is no longer possible to determine through the detection circuit 24 whether an overvoltage is still present or not. The advantage of this type of connection is that, since the voltage across transistor 20 drops to a low value, little energy is dissipated in transistor 20. The drawback lies in the fact that such a protection is triggered even for overvoltages having a very low energy, for which such a protection is superfluous.
In sum, in the prior art, two types of protection circuits are available. One protection circuit is suitable for protections against low energy overvoltages but is capable of destroying the component if the overvoltage energy is too high. The second protection circuit is suitable for protections against high energy overvoltages but unduly impairs the operation of the switching element when low energy voltages only are to be eliminated.